1. Field
Embodiments of the present invention generally relate to semiconductor substrate processing systems and, more specifically, to methods and apparatus for processing substrates using a pulsed plasma.
2. Description of the Related Art
In semiconductor integrated circuit (IC) fabrication, devices such as component transistors are formed on a semiconductor wafer substrate that is typically made of silicon. During the fabrication process, various materials are deposited on different layers in order to build or form the desired integrated circuit. The various layers define devices that are interconnected by metallization lines. During certain plasma enhanced processes that are performed upon wafers (also referred to in the art as substrates) that already contain devices and metalized lines, a substantial amount of charge may accumulate on the surface of the wafer. This charge accumulation may not be uniform across the wafer. As such the charge accumulation may cause destructive currents to be induced in some of the metalized materials and/or cause arcing within dielectric layers. The currents and/or arcing may destroy or damage certain devices that have previously been formed on the wafer. To mitigate the charging effects and avoid charging damage, the power supplied to a plasma within a plasma enhanced reactor may be pulsed. As such, the power coupled to the plasma is pulsed during all or part of the plasma enhanced process. One example of such a technique for use in an etch reactor is disclosed in U.S. Pat. No. 6,255,221, issued Jul. 3, 2001.
One drawback of using a pulsed plasma etch reactor is that the power from an RF generator or RF source must be coupled through a dynamically tuned matching network (also referred to as a match unit) to an antenna or electrode within a plasma reactor. The pulsed power is coupled from the antenna or electrode to process gases within the reactor to form a plasma that is used for the etching process. The matching network ensures that the output of the RF source is efficiently coupled to the plasma to maximize the amount of energy coupled to the plasma. The matching network matches the, typically, 50 ohms to a complex impedance of the plasma. To facilitate dynamic matching as the plasma characteristics change during processing, the matching network is continuously adjustable to ensure that a match is achieved and maintained throughout processing.
Generally, a controller that executes the process recipe controls the matching network. The controller also monitors the reflected power from the matching network. If the reflected power from the matching network rises, the controller will adjust the capacitance or inductance of the matching network to achieve a more sufficient match for the RF source to the existing plasma within the chamber. Since the matching networks for coupling high power RF energy to a plasma generally contain mechanically tunable elements (i.e., capacitors and/or inductors), the tuning process may be slow compared to the pulse length of the RF pulse that is desired to be coupled to the plasma. As such, when pulsing power into the matching network as the network is adjusted with each pulse, the reflected power may be sporadic or inconsistent with actual reflected power, causing the controller to under or over adjust the matching network. Such continuous adjustment may cause excessive reflected power and a reduction in plasma power coupling efficiency.
Therefore, there is a need in the art for improved methods and apparatus for operating a plasma enhanced semiconductor wafer processing using pulsed power.